|
At the risk of being shot down in flames (what else is new), I think the Intel assembler instructions AAM and/or AAS provide the basis of packed BCD support. In practice the speed BCD or packed BCD (without hardware support) is dependent on usage (suprise), addition, substraction, comparison of a word long BCD is PDQ. Division is a slow. DB Dave Dodge wrote:
Some 1960s IBM mainframes such as the 360 have BCD instructions. I assume its successors such as the 370, 390, and the current zSeries have the same instructions for backward compatibility. I don't know if any modern CPUs support BCD for any reason _other_ than backward compatibility with old code, though.